Measurement-computing PC104-DAS16JR/12 Manual de usuario descargar pdf (Pagina 16)

Table 3-2. Register Summary

Pacer Clock Control (8254)None. No read back on 8254.BASE + 15

CTR 2 Data - A/D PacerCTR 2 Data- A/D Pacer ClockBASE + 14

CTR 1 Data - A/D PacerCTR 1 Data - A/D Pacer ClockBASE + 13

Counter 0 DataCounter 0 DataBASE + 12

Gain controlGain setting read-backBASE + 11

NonePacer clock control registerBASE + 10

Set DMA, INT etc.DMA, Interrupt & Trigger ControlBASE + 9

NoneStatus EOC, UNI/BIP etc.BASE + 8

NoneNoneBASE + 7

NoneNoneBASE + 6

NoneNoneBASE + 5

NoneNoneBASE + 4

Digital 4 Bit OutputDigital 4 Bit InputBASE + 3

Channel MUX SetChannel MUX ReadBASE + 2

NoneA/D Bits 1 (MSB) to 8BASE + 1

Start A/D ConversionA/D Bits 9 to 12 (LSB) & Chan. #BASE

WRITE FUNCTIONREAD FUNCTIONADDRESS

3.2 A/D DATA & CHANNEL REGISTERS

BASE ADDRESS:

3.2.1 12-BIT BOARDS

CH1CH2CH4CH8A/D12

LSB

A/D11A/D10A/D9

01234567

Read/write register.

READ

On read, it contains two types of data. The least significant four digits of the analog

input data and the channel number which the current data was taken from.

These four bits of analog input data must be combined with the eight bits of analog

input data in BASE + 1, forming a complete 12 bit number. The data is in the format

0 = minus full scale. 4095 = +FS.

The channel number is binary. The weights are shown in Table 3-1. If the current

channel were 5 then bits CH4 and CH1 would be high, CH8 and CH2 would be low.

1 2 ... 11 12 13 14 15 16 17 18 19 20 21 ... 31 32

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Measurement-computing PC104-DAS16JR/12 Manual de usuario Pagina 16