Measurement-computing CIO-PDMAxx Manual de usuario Pagina 25
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6.0 SPECIFICATIONS
Typical for 25°C unless otherwise specified.
Power Consumption
+5VDC
CIO-PDMA16 850 mA typical, 1.0 A max
CIO-PDMA32 900 mA typical, 1.1 A max
Digital Input / Output
Digital Type Auxiliary
Configuration Output
Number of channels 3
CIO-PDMA16
74LS273
Output High 2.7 volts min @ −0.4 mA
Output Low 0.5 volts max @ 8 mA
Input High 2.0 volts min, 7 volts absolute max.
Input Low 0.8 volts max, −0.5 volts absolute min
CIO-PDMA32
74LS125
Output High 2.4 volts min @ −2.6 mA
Output Low 0.5 volts max @ 24 mA
Input High 2.0 volts min, 7 volts absolute max
Input Low 0.8 volts max, −0.5 volts absolute min
Digital Type Ports A & B
CIO-PDMA16
Output 74LS374
Input 74LS244
CIO-PDMA32 74LS245
Number of channels 16 I/O
Output High 2.4 volts min @ −2.6 mA
Output Low 0.5 volts max @ 24 mA
Input High 2.0 volts min, 7 volts absolute max
Input Low 0.8 volts max, −0.5 volts absolute min
Power-up / Reset State
Input mode (high impedance)
Digital Pacing
Programmable: internal counter, external
source (Transfer Req In) or software polled
21
- Revision 5 1
- September, 2000 1
- HM CIO-PDMA##.lwp 2
- This page is blank 4
- 1.0 INTRODUCTION 5
- 2.0 SOFTWARE INSTALLATION 6
- 3.0 HARDWARE INSTALLATION 6
- 3.3 WAIT STATE JUMPER 8
- 4.1 SIGNAL CONNECTIONS 9
- 5.0 REGISTER MAPS 12
- 5.2 CIO-PDMA32 REGISTER MAP 17
- BCDM0M1M2RL0RL1SC0SC1 20
- I0I1I2I3 21
- REP_DONEREP_FLGOVERRUNUNDER 21
- CommentsHALF_FF_CNT_REP_CONT 23
- DescriptionNameBit 23
- XXXXXXXX 24
- B0B1B2B3B4B5B6B7 24
- A0A1A2A3A4A5A6A7 24
- 6.0 SPECIFICATIONS 25
- Counter section 26
- Environmental 27
- For your notes 28
- EC Declaration of Conformity 31
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